This post is an excerpt from our newsletter in which we take a deep look at the shifting trends of the semiconductor industry. If you would like a full copy of the note, please contact us directly
The semis industry today appears to be approaching meaningful change. For digital products, especially in high-volume applications, the industry is consolidating to a smaller and smaller number of vendors, boosting prices but disgruntling customers. Semis executives are reaching the conclusion that their options are reduced playing the part of predator, and acquiring smaller rivals, or playing the role of prey, and submitting to the wave. For many applications, this process is now complete. There are a few holdouts, notably the large number of small and mid-sized Analog providers. We suspect that these companies will undergo their own wave of consolidation soon.
All of this has opened up the door to new alternatives. And now the race is on to determine just who is going to walk through that door.
Just as these trends seem to be propelling the industry in one direction, a new front appears to be emerging. As we discussed above, many of the costs of designing a chip have fallen, allowing customers to start exploring designing their own chips. However, this opportunity is only open to companies with sufficient resources to pay the upfront licensing costs for necessary IP. To outside observers this appears to be have blown the doors wide open with every company entering the fray. In reality, the number of companies bringing semis design in-house is actually very limited.
Let’s put some numbers to this to make it tangible. A basic design team requires about 100 people. In theory much smaller teams are possible, but will risk taking too long to come to market. In practice, these teams often end up much larger. We believe some of the large companies have 1000+ person teams. It is worth exploring this number a bit as it is revealing to some of the difficulties involved. Designing a chip is a process that has thousands of steps. Given the realities of modern management, it can be highly tempting to staff design teams generously to complete that task list faster. Senior designers want to offload mundane tasks to junior designers, and managers are rarely averse to having bigger teams. A key weakness is that since semis design is usually far removed from these non-semis companies’ core activities, executive teams are often not familiar with semis processes. The risk is that they accede to their design team’s requests too readily because they lack the subject matter expertise and experience. If the experts ask for 1,000 people who are we to argue?
Getting back to the math for a design team of 100 people. Salaries for chip developers have closed the gap (downward) with other engineers, but the whole talent pool has seen a massive increase in compensation in recent years. So let’s say that a fully-loaded designer costs an average of $300,000 per year, or $30 million in headcount for 100 people.
Next come the licenses. These prices are closely guarded and highly variable, but for our purposes we will peg them at $10 million in design tools and another $10 million in ARM licenses. Our best guess is that these figures are low. So before the first product ships, we are looking at $50 million in opex.
Now let’s look at the benefits. Chip gross margins for high-value digital products are in the range of 70%, plus or minus. That means for a $100 chip, $70 is captured by the vendor. By moving to in-house designs, customers can re-capture that amount, but to cover the opex, it would require the in-house design team to replace ~$71 million in parts that they would have otherwise purchased from a merchant vendor ($50m/70%). Going back to that $100 part, a customer designing their own chip would need to consume 700,000 units to break even on the design investment ($70m/$100). By comparison if the design team is 500 people (instead of 300) and license fees are double, that works out to 2 million units to break even on the investment.
Based on this math, this looks like a good move for many companies. Apple’s design team is probably massive, thousands of people as their A-series of applications processor is an immensely complicated (and impressive) chip. But they ship 100m+ iPhones a year, so the economics are very compelling. And we have not even factored in the competitive advantage they are building with that chip or the synergies with other parts of their business. (Hint: by this math replacing Intel in the Mac computers looks very appealing economically.)
So this is a highly profitable investment. Everyone must be piling in… The problem is of course that upfront payment, which very few companies can afford. And beyond that there is the very real problem of managing a big team in this non-core field.
Put simply, companies have to really want to do this and see some very clear strategic reasons for going down this path. Another company that appears to be designing their own chips is Amazon. They recently discussed a line of chips for speech recognition which they want to use to seed their Alexa and AWS services via consumer electronics companies. The company has given very few hard numbers as to their volume of Alexa speaker shipments. Most estimates pin this at cumulatively less than 20 million units in 5 years of shipments. If true, we suspect that their investment in in-house chip design is still a loss-making proposition. Amazon is notoriously immune to profit considerations, and they can certainly afford it. That being said, if even Amazon is struggling to make in-house design profitable, what hope is there for other companies?
A big problem facing consumer electronics (CE) companies with chip design aspirations is that unit volume problem. All those chip design costs have to be amortized over their end-product shipments, and there are very few product categories that support those volumes.
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A couple of inputs for you (ex-baseband IC design proj mgmt, ex-memory product mgmt):
* Team size: use the chip’s # of functional blocks as a proxy. An cellular baseband SOC, built with many semi-independent blocks, is a worst case scenario due to the amount of verification coverage necessary. A 200 person team is very common. Compare that to a high-end memory with comparable ASPs – I’ve been on memory design teams with <10 people. Just as many gates – but "more of the same" functionality.
* Compensation: $300K/head (loaded) is roughly on target for the Bay Area, but every design team that I've known uses a mix of high-cost and offshore talent to finish a design. A blended cost of $125-150K/head is more palatable. Especially so if the end product goes into a consumer item.
* Design strategy: the NRE barriers is why most companies shy away from full-custom design flows. Instead they introduce prototypes on configurable chips (aka FPGAs), then "harden" the designs once the feature sets stabilize.
Thanks. All good points.
I especially like: “use the chip’s # of functional blocks as a proxy”
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