Google BigChip?

Like a teenager with our favorite K-pop idol, we are apparently obsessed with Google’s VCU. We wrote about Google’s newest chip (and entire new semis product category) earlier this week, highlighting how Google solved a very specific problem by building something new in silicon. In that note, we emphasized that one of the most interesting things about the VCU was that is was essentially designed by a team that otherwise largely focused on software. One of our readers pointed out that this is not quite so remarkable, the tools for this have been around for a long time, although he conceded he did not know any large implementations. And then another reader pointed out that Google actually used their own tools to design the chip. Which made us stop in our tracks. Google has internal tools for designing chips? That is curious.

So we went back to the academic paper the YouTube team published and found exactly one mention of this tool, which they call Taffel:

3.4 High-Level Synthesis for Agility
The state-of-the-art hardware design flow adopted in the VCU development is a combination of Mentor Graphics’ Catapult [52] tool and an in-house integration tool called Taffel
[emphasis added] that creates the C++ and Verilog fabric for composing individual HLS leaf blocks.

So there is a lot going on this paragraph, but before we delve into it, a note about the name. If you Google search Taffel, you will find exactly zero mentions of this tool, not even a link to the paper written by Google employees. We are really starting to think Google has deliberately removed the paper from its search index. However, the search for Taffel points to its origin. It turns out “Taffel” is the name of the first potato chip brand in Finland. Chips. Get it? This is very Google.

Back to technology. A few things to note about this. First, they are actually using two tools – their own Taffel and Catapult from EDA design tools company Mentor Graphics (that ’52’ footnote links to the product page). So they still have outside dependencies, and the Mentor Graphics tool is probably more important (Verification is something like 50% of design costs). Secondly, they describe their use of tools in a section entitled “High-Level Synthesis for Agility”. Agility, of course, is a common descriptor of software practices, the ability of software to be updated dynamically. This is not a term commonly used in semis (although it is popping up more). In the original blog post from YouTube, they make a mention of how much time they spent simulating the VCU’s performance, and we suspect a lot of that was done on these tools. The rest of this section describes how important Taffel was because it allowed them to design their chip in a highly modular manner, as you would with software (i.e. the tool lets them be more agile).

So Google has built an internal tool for simulating and composing semiconductors. We re-read this section a couple times, and it does not sound like the YouTube cobbled Taffel together for one-shot use, it sounds like it was built by some other body for use by many teams. Hey everybody – Google is designing more chips.

Aside from this not-entirely-surprising revelation, this whole Taffel project got us thinking. Google has a history of creating useful software tools which it then open sources, allowing others go out and build entire industries on top. Big Table which led to Hadoop and most modern databases, or TensorFlow, which pretty much sparked what we call AI today. So we were wondering if Google might open source Taffel.

If they did so, it could spark a big shift in how and who designs chips. Admittedly, Taffel is not a complete solution, so designers would still need to pay the EDA Tax. Then again, maybe Google has more tools in the works. This would be bad for the incumbent design companies like Mentor, Cadence and Synopsis. But before you rush out and short their stocks, understand that this is all entirely speculative.

That being said, this is the kind of thing that could spark a lot of innovation. BigTable did not kill Oracle, but it did let 100 flavors of new-model database companies emerge. This could be one of the things that lets many other software teams at many other non-semiconductor companies design their own chips. And taking it a step further, this could become a big deal in China where semis companies are very worried about losing their access to US EDA tools.

Maybe we are getting ahead of ourselves. The mere fact that Google has something like Taffel speaks to larger ambitions. But maybe there is something else in store.

2 responses to “Google BigChip?

  1. I think about this from a different perspective. Software coding is a way to define a machine. Process, actions, input, outputs. Sounds like Google is providing a tool & methods to provide an option to implement software code as hardware, i.e. transistors & connections in a chip. Compliers do something similar with high level coding languages, converting them into zeroes & ones that a machine can interpret. We have had compiled (c++) & interpreted (Python) languages for a long time, but only option for hardware was interpreted. Sounds like Google is developing software to enable “compiling” the code into hardware.

    • It’s all just layers of abstraction, and the fewer the layers the more efficient the execution can be. Google/YouTube has just removed a few layers and burned it into silicon.

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