Dig a little into RISC-V and all sorts of fun things start to pop up. There is a tremendous amount of experimentation taking place around RISC-V processors lately, and the whole ecosystem is showing tremendous creativity and momentum. That being said, RISC-V is not for everything and every project, so it is worth exploring a bit to understand where things might be headed.
First, some background. RISC-V is an open source library of intellectual property (IP) for building semiconductors. Put simply, it is an open source alternative to ARM, it is not too far to think of RISC-V as the Linux to Arm’s Windows, but let’s come back to that metaphor below. More broadly, RISC-V is a set of ‘building blocks” for semis, ARM and RISC-V both create a set of commonly-used, highly technical blueprints for the less glamorous bits of a semiconductor. We often compare chip design to architectural blueprints, with RISC-V providing the design for the important but non-differentiated bits of the house (e.g. the plumbing, the wiring, the bathrooms). Chip designers like Qualcomm focus on the parts of the chip that matter most to their customers (e.g. 5G), and then use Arm designs for the parts of the chip that do highly repetitive math. As we have noted repeatedly in our coverage of Arm, the licensing terms for their IP can be very expensive, prohibitively so for new companies. RISC-V is a library of IP that essentially anyone can use for free.
RiSC-V came out of the engineering department of U.C. Berkeley (Go Bears!), and has caught a lot of people’s imagination and dedication. In its early days, RISC-V was most widely adopted by early stage, cost highly cost-conscious chip start-ups targeting small volume products – think IoT and chips for industrial machinery. But soon every Arm customer was at least dabbling with RISC-V. Most of those efforts were science projects and experiments, but that changed last year when Nvidia announced it was buying Arm. When that deal was announced we said the day after the announcement every big company RISC-V project got its budget increased. Nvidia competes with a lot of Arm customers, and none of them are comfortable with Nvidia owning Arm. In the year since, we have seen a strong increase in the number of RISC-V based start-ups, and now they are going after many more markets with a lot looking at the big pools such as the data center market. It should also come as no surprise that China is emerging as a hotbed of RISC-V activity, with Chinese contributors often showing up as major contributors to the open source effort.
As we said in the introduction, viewing RISC-V as the Linux of the semis world is not a terrible analogy. Both are open source software projects, both rely on contributions form the community, and both require a fair amount of engineering to take from raw open source files to actual working project. The big difference is that to move from software code to working product RISC V requires chips to actually be manufactured at a foundry such as TSMC, while anyone with working Linux code can push their software into production.
Nonetheless, the semis industry has made incredible strides over the past decade, and it is now fairly easy for ‘amateurs’ (pro-sumers?) to start designing their own chips in software, which means it is much easier to build a chip on a start-up budget before requiring big VC checks to actually go into production. RISC-V has made creating a ‘minimum viable product’ achievable for semis start-ups, and hence we are seeing this explosion of RISC-V companies.
That being said, RISC-V is not for everyone. As much as the project has advanced technically, it still lacks a fair amount of features, put differently, it still requires a fair amount of engineering to get it working. And while the RISC-V community has solidified, this does not work for all builders. It is also proving to be a bit of dilemma for the big companies. For chip companies who have decades of Arm chips in their portfolio, porting to RISC-V is often not workable. For a large company just to re-build their test suites would probably require years of work. So much of semis performance comes down to small, labor-intensive optimizations. So it is unlikely that Qulacomm or Marvell is going to switch all their products to RISC-V. Instead, we expect those companies to use RISC-V for new products and side projects. And despite all the effort going into RISC-V in the data center, we think high performance CPUs are not going to be an easy market for RISC-V, all those optimizations we mentioned above really come into play here, and we have decades of legacy software ecosystems running on top to contend with. It has taken Arm over a decade to claw out a toehold in the data center, despite having some very deep pockets making the effort.
A frequent question we get is how to invest in all this RISC-V goodness. And the answer is that it is not easy. A quick scan of the RISC-V start-ups out there show that (outside China) these companies are largely raising money from angel investors, typically those with a background in semis, traditional VCs are just starting to show interest in the space, and it is still largely the same pool of semis-friendly investors we see in all the semis deals. There is also SiFive, which to extend the metaphor is the Red Hat of the RISC-V world, a company helping others make products out of open source code. And while SiFive is doing well, it still struggles with its basic business model – making money off of something that is free – the same problem Red Hat struggled with for many years.
Overall, RISC-V really appears to be gaining momentum. And despite the wrinkles here and there, we think the market looks to be lining up well for the ecosystem. And if Nvidia actually manages to close Arm, that momentum will get a further boost.